Minimalistic Assembler Interpreter

Minimalistic Assembler Interpreter (also known as miniasm) is an open source, cross-platform and freely distributed CLI (Command-line Interface) software project implemented in C++ and designed to provide interpreter, compiler and assembler tools for bytecode (a.k.a. p-code or portable code).

Allows you to compile interpreted bytecode

With Minimalistic Assembler Interpreter, you will be able to compile interpreted bytecode (.iasm) from mini-assebler (.masm) and short-(.sasm), interpret the bytecode, compile the bytecode into binary code, as well as to write mutatable programs. It uses only relative adressing.

Getting started with Minimalistic Assembler Interpreter

The software is still in heavy development, distributed only as an Alpha release at the moment, which means that you can’t really use it. We’ve tried to compile it, but it doesn’t work because the main.o file is missing from both the compiler and interpreter components. A more complete, Beta version, should be available soon.

Adding new commands is easy

In order to add a command, users need to enlist it first in CODEREF, then create a (sub-)struct in the /interpreter/command.h file, and add the command into the /compiler/compiler.cpp file for the compile or the /interpreter/interpreter.cpp file for the interpreter.

While for the compiler, you can add commands to getCommandLength(), createCommandFromStringArray() and createBytecodeFromCommand(), for the interpreter, you can add commands to interpreter::run() and interpreter::printCommand().

Under the hood and supported operating systems

Taking a look under the hood of the Minimalistic Assembler Interpreter software, we can notice that it has been written entirely in the C++ programming language. It’s a command-line software that can only be used from a terminal/console environment.

Supported operating system include all GNU/Linux distributions, as well as the FreeBSD operating system. Minimalistic Assembler Interpreter is currently supported on 32 and 64-bit CPU architectures.